AMD has officially announced the launch of their 7nm EPYC Rome processors today, offering higher core count, best in class performance, value & efficiency. Being the first high-performance data center, AI, & HPC centric chips based on TSMC's bleeding-edge 7nm process node, the Rome lineup takes AMD one step ahead of their Xeon rivals that still utilize 14nm technology.

AMD EPYC Rome Officially Launched - 7nm, 64 Cores, 128 Threads, Higher Clocks, Best-In-Class Performance, Efficiency, and Value

AMD's 2nd Generation EPYC Rome series is the successor to the first Generation EPYC Naples line of processors which launched two years back. Based on the 7nm Zen 2 core technology which has offered a 15% IPC uplift over the original Zen core, the AMD EPYC Rome CPUs are designed to offer higher performance and better efficiency than their predecessors.

At the launch event, several customers and partners joined AMD on stage to discuss new AMD EPYC processor offerings:

Google announced it has deployed 2nd Gen AMD EPYC processors in its internal infrastructure production datacenter environment and in late 2019 will support new general-purpose machines powered by 2nd Gen AMD EPYC processors on Google Cloud Compute Engine as well;Twitter announced it will deploy 2nd Gen AMD EPYC processors across its datacenter infrastructure later this year, reducing TCO by 25%;Microsoft announced the preview of new Azure virtual machines for general purpose applications, as well as limited previews of cloud-based remote desktops and HPC workloads based on 2nd Gen AMD EPYC processors today;HPE announced the continued support of the AMD EPYC processor family with plans to triple their AMD-based portfolio with a broad range of 2nd Gen AMD EPYC processor-based systems, including the HPE ProLiant DL385 and HPE ProLiant DL325 servers;Cray announced the Air Force Weather Agency will be using a Cray Shasta system with 2ndGen AMD EPYC processors to provide comprehensive terrestrial and space weather information to theU.S. Air Forceand Army;Lenovo announced new solutions that are specifically built to take advantage of the full range of enhanced capabilities found in the 2nd Gen AMD EPYC processors. Available today, the ThinkSystem SR655 and SR635 are ideal solutions for use cases such as video infrastructure, virtualization, software-defined storage and more, with exceptional energy efficiency;Dell announced the upcoming availability of newly designed servers optimized for 2nd Gen AMD EPYC processors;VMware and AMD announced a close collaboration to deliver support for new security and other features of the high-performance 2ndGen AMD EPYC processors within VMware vSphere.

Zen 2 doesn't only offer higher performance but due to a smaller manufacturing process, the resultant die size has allowed AMD to cram twice the number of cores and threads on the EPYC 7002 CPUs while retaining higher out of box clock speeds.

Following are some of the salient features of the 7nm EPYC Rome processors:

Built on7nmadvanced process technology – the best the industry has to offer, allowing for denser compute capabilities with lower power consumptionThe world’s first64 core data center CPU, built using Zen 2 high-performance cores and AMD’s innovative Chiplet architectureThe world’s first mainstreamPCIe Gen 4.0data center CPU with a bandwidth of up to 64GB/s, twice of PCIe Gen 3.0Embedded security protectionto help defend your CPU, applications, and data

AMD has made significant changes to their CPU architecture which help deliver twice the throughput of their first-generation Zen architecture. The major points include an entirely redesigned execution pipeline, major floating-point advances which doubled the floating-point registers to 256-bit and double bandwidth for load/store units. One of the key upgrades for Zen 2 is the doubling of the core density which means we are now looking at 2x the core count for each core complex (CCX).

Improved Execution PipelineDoubled Floating Point (256-bit) and Load/Store (Doubled Bandwidth)Doubled Core DensityHalf the Energy Per OperationImproved Branch PredictionBetter InstructionPre-FetchingRe-Optimized Instruction CacheLarger Op CacheIncreased Dispatch / Retire BandwidthMaintaining High Throughput for All Modes

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Each EPYC Rome processor is made up of 8 Zen 2 dies which are interconnected through the 2nd Gen Infinity Fabric with an I/O die that acts as a central hub of the processor. The Rome processor has a total of 32 billion transistors on the entire package, which makes it one of the most densely packed chip design ever developed.

AMD CPU Roadmap (2017-2022)