AMD has officially unveiled their Vega GPU to the masses at CES 2017. Along with the architectural preview, AMD also provided a glimpse at the Vega GPU die which will power the next-generation Radeon RX 500 series graphics cards.

AMD Vega GPU Pictured Up Close - 8 GB VRAM, 512 GB/s Bandwidth From Two HBM2 Stacks

The AMD Vega GPU was actually showcased to selected press at the AMD Tech Summit. The new graphics chip will be AMD's first consumer aimed GPU to utilize the new HBM2 standard. This will allow them to double the capacity per die and clock per pin.

The first generation HBM graphics cards such as the Radeon R9 Fury X was limited to just 4 GB of VRAM and had a bandwidth of 512 GB/s. It had 4-layers per stack (256 MB per layer) and that will continue with the latest Vega GPUs since AMD will have to maximize value on these cards for the gaming audience. In the case of 4-layers, we will be looking at higher densities per layer. The pin speed also increases with HBM2. The new memory standard can clock up to 2 Gb/s compared to 1 Gb/s on HBM1.

The increased clock speed would allow the same memory bandwidth as four HBM1 stacks on just two HBM2 stacks. The increased density also allows AMD to cut down the costs in designing larger interposers. HBM2 itself takes more space compared to HBM1 with a die size around 92mm2 while HBM1 was just 35mm2 in size.

A Close-up of AMD's Biggest FinFET GPU To Date - The Mighty Vega, Over 500mm2

AMD Vega GPU is compared to other chips from NVIDIA and AMD. (Image Credits: Videocardz)

Close-ups of the GPU posted by TechReport, Computerbase and 4Gamer reveal that the GPU is the biggest FinFET design by AMD. Videocardz also made a comparison that showcases the huge chip against other GPUs such as the NVIDIA GP102, GP102 and AMD's Fiji GPU. The chip is somewhere in between 530-560mm2 so this is really a monstrous chip design and should pack a lot of power.

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AMD GCN GPU Architectures

Highlights of the Vega GPU architecture's advancements include:

The world's most advanced GPU memory architecture: The Vega architecture enables a new memory hierarchy for GPUs. This radical new approach comes in the form of a new high-bandwidth cache and its controller. The cache features leading-edge HBM2 technology which is capable of transferring terabytes of data every second, doubling the bandwidth-per-pin over the previous generation HBM technology. HBM2 also enables much greater capacity at less than half the footprint of GDDR5 memory. Vega architecture is optimized for streaming very large datasets and can work with a variety of memory types with up to 512TB of virtual address space.Next-generation geometry pipeline: Today's games and professional applications make use of incredibly complex geometry enabled by the extraordinary increase in the resolutions of data acquisition devices. The hundreds of millions of polygons in any given frame have meshes so dense that there are often many polygons being rendered per pixel. Vega's next-generation geometry pipeline enables the programmer to extract incredible efficiency in processing this complex geometry, while also delivering more than 200% of the throughput-per-clock over previous Radeon architectures. It also features improved load-balancing with an intelligent workload distributor to deliver consistent performance.Next-generation compute engine: At the core of the Vega architecture is a new, next-generation compute engine built on flexible compute units that can natively process 8-bit, 16-bit, 32-bit or 64-bit operations in each clock cycle. These compute units are optimized to attain significantly higher frequencies than previous generations and their support of variable datatypes makes the architecture highly versatile across workloads.Advanced pixel engine: The new Vega pixel engine employs a Draw Stream Binning Rasterizer, designed to improve performance and power efficiency. It allows for "fetch once, shade once" of pixels through the use of a smart on-chip bin cache and early culling of pixels invisible in a final scene. Vega's pixel engine is now a client of the onboard L2 cache, enabling considerable overhead reduction for graphics workloads which perform frequent read-after-write operations.

AMD Radeon Vega Official Architecture Slides:

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AMD Vega Lineup