This is the moment that all PC hardware enthusiasts have eagerly awaited for nearly half a decade. AMD today has officially pulled back the covers on its brand new high performance Zen CPU microarchitecture, its features, specs and most importantly performance. That's right, this is the very first time that the company has actually demonstrated the performance of Zen directly against its competition from Intel.
This all took place in a private media event that the company held in San Francisco. At which AMD's President & CEO Lisa Su took the stage alongside Chief Technology Officer Mark Papermaster to talk all about Zen.Sowhat exactly did they have to say? to summarize it in twowords, a LOT!
Zen, AMD’s Most Important ProductIn More Than A Decade
Many Years In The making
Zen has been one of AMD's most eagerlyanticipated products for as far as I can remember. It’s the company’s first attempt to compete at the high-end, enthusiast, CPU market since the introduction of the Bulldozer microarchitecturefive years ago. Zen breaks new ground for AMD in many ways. It’s thecompany’s first ever CPU architecture to feature simultaneous multithreading.It’s alsothe very first productfor AMD to be built on a process technology that's very close toparity with Intel since the days of the original Athlonmore than a decade ago.
This fact alone is huge. It means that forthe very first time since the early 2000s AMD’s CPU products won’t be at an inherent disadvantage due to Intel’s process lead. From an architectural point of view Zen is a brand new clean-slate design that’s been led from the get-go by accomplished CPU architect Jim Keller. The very same engineerthat played a pivotal role in designingthe original Athlon XP and Athlon64 processors.The most competitive CPUproductsinthe history of the company.

Zen is AMD’s biggest long-term technology bet and one of the company’s largest engineering efforts undertaken by the company. President & CEO Lisa Su stated that this year’sproducts,culminated in Zen and Polaris,representcompany’s most competitive roadmap in more than a decade.
AMD President & CEO Lisa Su – Q4 2015 Earnings Call
“We remain focused on completing our strategic work around three key growth pillars. First, in PCs, even in a declining overall market, we believe we can regain client compute and discrete graphics share for the year, driven by gaming, VR, commercial, and our most competitive product roadmap in more than a decade.
We have clear opportunities to regain GPU share in 2016 based on the performance per watt of our new GPUs and software leadership. Earlier this quarter at CES, we announced our new Polaris GPU architecture, which we expect to begin shipping in the middle of 2016.”
The microarchitecture taped out back in 2015 and is already sampling. Consumer based desktop products are on track to be available en mass in 2017. However, we know that AMD is working on far more than just high performance desktop CPUs. The company has had 32 Core Zen server CPU, a sixteen core Zen HPC APU and a quadcore Zen consumer APU all in the works for several years.
The Zen Microarchitecture
Below we havea visual representation of Zen's high-level design from AMD. Interestingly enough it looks very much like our very own in-house diagram that we had published last year. The integer cluster in each Zen core has six pipes, four ALUs, Arhithmatic Logic Units, and two AGUs which is short for Address Generation Units.















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These AGUs can perform two 16-byte loads and oine 16-byte store per cycle via a 32 KB 8-way set associative write-back L1 data cache. According to AMD the move from a write-through to a write-back cache has noticeably reduced stalls in several types of code paths. The load/store cache operations cache in Zen also reportedly exhibit lower latency compared to Excavator.


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The floating point unit is capable of performing two FMAC operations or a single 256-bit AVX operation per cycle. Exactly as we had detailed in our exclusive architectural deep-divelast year funnily enough.
AMD's First Microarchitecture To Feature Simulataneous Multithreading
AMD has done away with the CMT - clustered multi-threading - concept that was introduced with the Bulldozer family of cores in 2011 in favor of a more traditional SMT - sumultaneous multi-threading - design. This means that each Zen core will be able to execute two threads simultaneously. A principal very high throughput thread and asecondary thread that can be used opportunistically.

In contrast, each Bulldozer module can execute two identical threads. This is achieved through two separate integer clusters with a single front-end. This approach saves area versus building two separate cores and delivers two high throughput threads. However, there are advantages that Zen's SMT implementation holds over the Bulldozer CMT implementation. For one it allows AMD to build a single larger integer cluster with significantly higher single threaded performance. Another advantage with this approach is that it leaves a lot of wiggle room for clever savings in area and power.
A Drive For Power Efficiency

| CPU Microarchitecture | AMD Phenom II / K10 | AMD BD/PD | AMD SR/XV | AMD Zen | Intel Skylake |
|---|---|---|---|---|---|
| Instruction Decode Width | 3-wide | 4-wide | 8-wide | 4-wide | 4-wide |
| Single Core Peak Decode Rate | 3 instructions | 4 instructions | 8 instructions | 4 instructions | 4 instructions |
| Dual Core Peak Decode Rate | 6 instructions | 4 instructions | 8 instructions | 8 instructions | 8 instructions |









