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The Taiwan Semiconductor Manufacturing Company (TSMC) has shared details about its next-generation 2-nanometer semiconductor manufacturing process in its annual report to shareholders. TSMC is the world's largest contract chip manufacturer, and it shipped more than ten million wafers last year even as the industry started to show the first signs of a slowdown. The firm's 2-nanometer manufacturing process will use nanosheet transistors and will initially be produced in two separate facilities in Taiwan, according to details shared in the report.

TSMC Reiterates 2-nanometer Volume Production Will Start In 2025

TSMC started producing chips on the 3-nanometer manufacturing process late last year, becoming one of the first companies in the world to do so. The volume production stage of manufacturing, which comes before mass production, made TSMC the second firm in the world to enter 3-nanometer production, as its smaller rival Samsung Foundry had taken the lead a couple of months earlier.

The firm's annual report shows that despite a slowdown in the semiconductor industry that started during the tail end of 2022, TSMC's wafer shipments nevertheless managed to grow. The company shipped 15.3 million 12-inch equivalent wafers last year, marking a 7.7% annual growth. Additionally, the proportion of wafers representing advanced chip manufacturing technologies (below 7-nanometer) accounted for 53% of the total mix as opposed to 50% of the total wafers shipped in 2021. As a whole, TSMC shipped nearly one-third, or 30%, of all the world's non-memory semiconductor products, increasing its share by 4%.

Moving towards 2-nanometer, or N2, TSMC shared that it plans to enter risk production of the technology next year and move to volume production in 2025. This reiterates the firm's executives' timelines during earnings calls, as it continues to assert that the next-generation technology will be the "most advanced semiconductor technology in the industry in both density and energy efficiency when it is introduced."

TSMC's revenue breakdown for the full fiscal and calendar year 2022. Image: TSMC

Delving into N2's performance, TSMC shares that the new chips will offer up to 15% performance improvement at power levels similar to the N3E process. N3E is TSMC's advanced variant of the 3-nanometer node, and the firm plans to start volume production of this technology in the second half of this year. At speeds similar to the N3E, N2 will offer up to 30% improvement in power consumption - a metric that will undoubtedly attract TSMC's largest customer Apple for processors for the MacBook lineup.

Finally, TSMC shares that N2 will use nanosheet transistors and will initially be manufactured in Taiwan's Hsinchu and Tainan cities. Details of these transistors were first shared by TSMC's senior vice president of research and development, Dr. Yuh Jier Mii, in 2021 during an online symposium.

At the event, the executive outlined that the nanosheet transistors had demonstrated a 15% drop in the minimum voltage (Vt) required for the circuit to work compared to the older FinFET transistors. At that time, Dr. Mii had not confirmed that N2 would use them; however, TSMC confirmed this fact a year later.

TSMC's rival, Samsung Foundry, believes that the shift to nanosheet will present the firm with significant technological constraints that might limit its ability to ramp up production successfully. As part of his comments made in South Korea yesterday, Samsung's president and general manager of the foundry business of the Device Solutions business division, Dr. Siyoung Choi, shared that since Samsung has already started to make chips with GAAFET (or nanosheets), his firm has an advantage over TSMC that can lead it to catch up to the Taiwanese firm in five years.